Getting Started with RISC-V Shanghai has ended
Monday, May 13 • 11:10 - 11:30
Perf-V: The cost-effective development board for RISC-V community / Perf-V:面向 RISC-V 社区的高性价比开发板

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We design the Perf-V Dev Board for RISC-V community. The Perf-V Dev Board equip with Xilinx Artix-7 FPGA, 256MB DDR3 memory, flash, and peripheral interfaces (including Arduino, PMOD, and high-speed interface). On Perf-V, we support various RISC-V cores, including two-stage pipeline HummingBird E200 and five-stage pipeline X-core. Upon RISC-V cores, we provide embedded applications and experiments, e.g. smart car, drone, and etc. Meanwhile, RISC-V application developers could use Perf-V IDE (Eclipse with the plugin) to compile and debug the source code on the Perf-V board. Additionally, we provide the reference documents and slides for teaching computer organization course, and embedded system course on RISC-V ISA. Therefore, the Perf-V Dev Board fulfills the need of RISC-V geeks, students, and teachers in universities.

我们专为 RISC-V 社区设计了 Perf-V 开发板。Perf-V 开发板配有 Xilinx Artix-7 FPGA、256MB DDR3 内存、闪存和外设(包括 Arduino、PMOD 和高速接口)。Perf-V 支持各种 RISC-V 内核,包括 2 流水蜂鸟 E200 和 5 流水 X 内核。我们利用 RISC-V 内核实施智能汽车、无人机等方面的嵌入式应用和实验。同时,RISC-V 应用开发人员可使用 Perf-V IDE(Eclipse 具有该插件)在 Perf-V 开发板上编译和调试源代码。此外,我们还提供用于讲授计算机组织课程和嵌入式系统课程(RISC-V ISA 专题)的参考文档和幻灯片。因此,Perf-V 开发板可全面满足 RISC-V 极客、学生和大学教师的需求。


先轶 张

CEO, PerfXLab澎峰科技
PerfXLab cofounder, OpenBLAS project maintainer.澎峰科技联合创始人,OpenBLAS 项目维护负责人。

Monday May 13, 2019 11:10 - 11:30
Bund Ballroom 上海外滩茂悦大酒店 / Hyatt on the Bund Shanghai, 199 Huang Pu Road Shanghai, China, 200080